An 8-bit CMOS current-mode folding and interpolation A/D converter with three-level folding amplifiers

This paper describes an 8-bit CMOS current-mode folding and interpolation A/D converter (ADC) with three-level folding amplifiers. A three-level folding amplifier is designed not only to reduce the number of reference current sources, but also to enhance the efficiency of the folding block. A delay time error correction circuit which requires only simple digital circuits is designed to make delay time error correction between a coarse quantizer and a fine quantizer used. The simulation results illustrate a conversion rate of 42 M Samples/s and a power dissipation of 30 mW at 5 V supply voltage. The active chip area occupies small area of 2.2 mm×1.6 mm in a 1.5 μm CMOS technology