VLSI implementation of Phong shader in 3D graphics

Author

Sin, Hyun-Chul ; Lee, Jin-Aeon ; Kim, Lee-Sup

Author_Institution

Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea

Volume

2

fYear

1998

fDate

31 May-3 Jun 1998

Firstpage

417

Abstract

With continuous improvement of VLSI technologies and request of higher realism, real-time Phong shading will be the next technology-push in 3D graphics. Taylor series approximation is appropriate for hardware implementation of Phong shading. We determined the hardware size of the Taylor series approximation in terms of hardware minimization through visual comparison and implemented Taylor series approximation in a 3-stage pipelined architecture

Keywords

CMOS digital integrated circuits; VLSI; computer graphic equipment; interpolation; microprocessor chips; pipeline processing; realistic images; series (mathematics); table lookup; 0.8 micron; 3-stage pipelined architecture; 3D graphics; 5 V; 50 MHz; Phong shader; Taylor series approximation; VLSI implementation; hardware implementation; real-time Phong shading; Computational efficiency; Continuous improvement; Graphics; Hardware; Interpolation; Light sources; Lighting; Reflectivity; Taylor series; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on

Conference_Location

Monterey, CA

Print_ISBN

0-7803-4455-3

Type

conf

DOI

10.1109/ISCAS.1998.706965

Filename

706965