A flexible technique for the automatic design of approximate string matching architectures

Systolic array architectures for approximate string matching play a significant role as hardware accelerators in biological applications. However, their wider use is limited by the lack of flexibility required by often variable tasks. In this respect, it is desirable to develop a procedure for automatic design and implementation of such accelerators to reach high performance and efficiency with as little human effort on the side of the designer as possible. This paper proposes the essential element of such procedure, a method for the calculation of generic systolic array parameters with respect to maximal performance and efficient resource utilization