DocumentCode
2186600
Title
Compact and short critical path finite field inverter for cryptographic S-box
Author
Wong, M.M. ; Wong, M.L.D. ; Zhang, C. ; Hijazin, I.
Author_Institution
Faculty of Engineering, Computing and Science, Swinburne University of Technology, Sarawak Campus, Malaysia
fYear
2015
fDate
21-24 July 2015
Firstpage
775
Lastpage
779
Abstract
A substitution box (S-box) plays a crucial role in symmetric key cryptography with block ciphers, such as those found in the Data Encryption Standard (DES) and the Advanced Encryption Standard (AES). It serves as the predominant component in most block ciphers, of which the computational complexity impacts the security of the ciphers directly. In essence, a S-box performs a non-linear transformation of the input data block through a finite field inversion, which is incidentally the most expensive operation in digital computation of finite field arithmetic. Consequently, its computational cost will also increase the overall hardware requirements and in turn, decrease the overall performance of the ciphers. With the emergence of Internet of Things (IoT), the need for highly secured yet lightweight implementation protocols is becoming increasingly more observable. In this paper, we propose a new finite field inverter over GF(28) with a significant area cost saving, achieved through direct computation and followed by algebraic factorization and common sub-expression elimination (CSE). The proposed inverter could be deployed into AES cipher on highly area-constrained digital platforms.
Keywords
Boolean functions; Ciphers; Hardware; Inverters; Logic gates; Standards; Algebraic Factorization; Common Sub-expression Elimination (CSE); Finite field inversion; Low complexity; S-box;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital Signal Processing (DSP), 2015 IEEE International Conference on
Conference_Location
Singapore, Singapore
Type
conf
DOI
10.1109/ICDSP.2015.7251981
Filename
7251981
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