Title :
Hw implementation of the backtrace algorithm with conflict-driven dynamic reconfiguration
Author :
Sfava, M. ; Novak, O.
Author_Institution :
Czech Tech. Univ. in Prague, Praha
Abstract :
Recently, a method for transformation of combinational circuits into a corresponding backward-determining structure was proposed in order to implement the backtrace algorithm into hardware. This structure is designed to find all possible assignments of values to primary inputs for achieving selected objectives. It differs from the known backtrace algorithms used in ATPG tools, where only the first valid assignment is found. A new proposed method, presented in this paper, extends the backward-determining structure by conflict-driven dynamic reconfiguration. The experimental data obtained for the ISCAS´85 benchmarks show that the area overhead is polynomial for implementation of transformed circuits without reconfiguration as well as of transformed circuits with reconfiguration. A conclusion of the experiments is that the average speed up is about 12% and the average growth of an area overhead is about 112%.
Keywords :
combinational circuits; field programmable gate arrays; logic design; ATPG tools; FPGA; automatic test pattern generation; backtrace algorithm; backward-determining structure; combinational circuits; conflict-driven dynamic reconfiguration; hardware implementation; Automatic test pattern generation; Circuit testing; Clocks; Combinational circuits; Field programmable gate arrays; Hardware; Heuristic algorithms; Logic testing; Polynomials; Sequential circuits;
Conference_Titel :
Design and Diagnostics of Electronic Circuits and systems, 2006 IEEE
Conference_Location :
Prague
Print_ISBN :
1-4244-0185-2
DOI :
10.1109/DDECS.2006.1649629