Several co-design issues using DfX for solid state lighting

The heteroepitaxial growth of GaN-based epitaxial layers on sapphire and SiC substrates increases process complexity during light-emitting diodes (LEDs) manufacturing process. The large lattice mismatch and coefficient of thermal expansion (CTE) mismatch between substrate materials and GaN materials, resulting in wafer curvature issue which can impact wavelength and intensity uniformity. Obtaining tighter control over the wavelength and intensity uniformity of the active MQW region will be critical. With the increasing size of wafers from 2in, 4in, 6in, to even 8in, the curvature and co-planarity will be an even challenging issue. Current MOCVD is from from being perfect in terms of wafer to wafer, run to run variations, which could be resulted from temperature and flow control of the reactor, heater, and gases. Additionally, the manufacturing process parameters of LED chip has significant effect on the LED device performance. One of the challenges for the application of wafer-level packaging in LED is the poor wavelength uniformity and reproducibility in the LED wafer. Several co-design issues for LEDs manufacturing using DfX is given in this paper.