DocumentCode
2189637
Title
Validating the design of real-time systems using a formal specification method
Author
Buendía-Garcia, Félix ; Vila-Carbó, Joan
Author_Institution
Dept. de Ingenieria de Sistemas, Computadores y Autom., Univ. Politecnica de Valencia, Spain
fYear
1996
fDate
12-14 Jun 1996
Firstpage
41
Lastpage
46
Abstract
This paper proposes a method for validating the design of a real-time system. The method is based on the formal specification of the target system and the verification of its timing requirements. The main contribution consists in introducing the design issues (e.g. the tasks parameters or the scheduling algorithm) in the system specification. It will allow to check how these design issues may affect the stated timing requirements
Keywords
formal specification; real-time systems; timing; formal specification method; formal verification; real-time systems; scheduling algorithm; system specification; target system; tasks parameters; timing requirements; Algorithm design and analysis; Constraint theory; Control systems; Formal specifications; Humans; Logic; Real time systems; Scheduling algorithm; Timing; Vehicles;
fLanguage
English
Publisher
ieee
Conference_Titel
Real-Time Systems, 1996., Proceedings of the Eighth Euromicro Workshop on
Conference_Location
L´Aquila
ISSN
1068-3070
Print_ISBN
0-8186-7496-2
Type
conf
DOI
10.1109/EMWRTS.1996.557787
Filename
557787
Link To Document