Array architecture and design for image window operation processing ASICs

In this paper, we present a novel architecture named as Window-MSPA architecture which targets window operations in image processing, as an extension of MSPA architecture. We have previously developed a memory sharing processor array (MSPA) for fast array processing with regular iterative algorithms. Window-MSPA consists of Window-PEs which performs window operations. It minimizes the data I/O ports and the number of Window-PEs. The image data input scheme is restricted to row by row input lines which simplifies the I/O architecture. Under this practical I/O restriction, the fastest processings are achieved. The architecture can be used for not only conventional image filtering, but practical window operations such as motion vector search in MPEG2. The derived architecture is flexible enough to adjust user´s requirements for either area or speed