A history-based I-cache for low-energy multimedia applications

Author

Inoue, Ken ; Moshnyaga, V.G. ; Murakarni, K.

Author_Institution

Dept. of Elec. Eng. & Comput. Sci., Fukuoka Univ., Japan

fYear

2002

fDate

2002

Firstpage

148

Lastpage

153

Abstract

This paper proposes a history-based tag-comparison scheme for reducing energy consumption of direct-mapped instruction caches. The proposed cache efficiently exploits program-execution footprints recorded in the branch target buffer (BTB), and attempts to detect; and eliminate unnecessary tag checks at run time. Simulation results show that our approach can eliminate up to 95% of tag checks, saving the cache energy by 17%, while affecting the processor performance by only 0.2%.

Keywords

cache storage; circuit simulation; integrated circuit design; integrated circuit modelling; logic CAD; logic simulation; low-power electronics; microprocessor chips; multimedia computing; BTB; branch target buffer; cache energy saving; direct-mapped instruction caches; energy consumption reduction; history-based instruction-cache; history-based tag-comparison scheme simulation; low power applications; low-energy multimedia applications; processor performance; program-execution footprints; run time tag checks; unnecessary tag check detection/elimination; Application software; Computational modeling; Computer science; Energy consumption; Handheld computers; Hardware; Informatics; Microprocessors; Permission; Random access memory;

fLanguage

English

Publisher

ieee

Conference_Titel

Low Power Electronics and Design, 2002. ISLPED '02. Proceedings of the 2002 International Symposium on

Print_ISBN

1-5811-3475-4

Type

conf

DOI

10.1109/LPE.2002.146728

Filename

1029582