Self-aligned extended-drain with compensating ion-implantation for extended-SOA in 30 V lateral MOS

A compensating ion-implantation method is introduced to make self-aligned extended-drain of 30 V lateral NMOS and PMOS transistors with the only one mask and to help the improvement of electrical SOA through the shift of the critical electric field position. In general, high voltage lateral MOS has been useful for high current and high voltage applications. In that case, we have to check up the critical electric field position and the current flow line occurring hot-carrier injection phenomenon because it results in unfavorable device destruction by secondary breakdown. In this paper, we shifted the critical electric field position from n+ drain edge to n+ drain bottom using self-aligned extended-drain formed by compensating ion-implantation. As a result, the occurrence of the secondary breakdown due to Kirk effect would be postponed.