Title :
Method for Decreasing Computation Load and Memory Access Frequency during Interpolation for Video Coding
Abstract :
This paper proposes a method to address the computation load and memory access frequency problems during interpolation for video processing (coding or decoding). The motion compensation process in video processing is computationally intensive and takes considerable computation time of the system, while the interpolation step in the process incurs the heaviest computation load. Exploiting the characteristics of strong correlation between natural images in a frame, this paper proposes a patented method that stores the computed interpolation values and then manages the values using memory address rotation (MAR) technique to decrease the computation load and memory access frequency.
Keywords :
Computer industry; Decoding; Energy consumption; Frequency; Interpolation; Memory management; Motion compensation; Personal digital assistants; Power supplies; Video coding; H.264; MAR; MC; MOR; interpolation;
Conference_Titel :
Signal Processing Systems, 2007 IEEE Workshop on
Conference_Location :
Shanghai, China
Print_ISBN :
978-1-4244-1222-8
Electronic_ISBN :
1520-6130
DOI :
10.1109/SIPS.2007.4387619