• DocumentCode
    2190917
  • Title

    Embedded Architectural Design Using Protection Logics to Defend Attack of Buffer Overflow and Unauthorized Access of Code

  • Author

    Yau, C.H. ; Tan, Y.Y. ; Fong, Anthony S. ; Mok, P.L.

  • Author_Institution
    Dept. of Electron. Eng., City Univ. of Hong Kong, Hong Kong
  • fYear
    2008
  • fDate
    8-11 July 2008
  • Firstpage
    264
  • Lastpage
    269
  • Abstract
    As security is always a major concern in most of the networked computer systems, embedded systems should provide security features to defend the attack and protect the confidential and sensitive data. Many Trojan Horses and viruses use the security holes of exception to trigger attack, such as buffer overflow attack. Although most embedded systems rely on the programmer, the compiler or the third-party security software to defend and protect the systems against the buffer overflow attack, these techniques could not completely maintain the overall system security. Using a secure programming language is another approach to protect the system, but this approach contains a large security hole that break the overall security. Therefore, this paper proposes a secure Java embedded processor architecture called jHISC with protection logic to protect the system naturally. This new processor realized the natural secure language features of Java in the core architecture to enhance the overall system security. It performs various rigid hardware bound checks and embedded access control checks to avoid the code bypassing. The current implementation phase is under version 4 with 4 KB instruction cache and 8 KB data cache is described by VHDL and implemented and verified in a Xilinx Virtex FPGA.
  • Keywords
    Java; field programmable gate arrays; security of data; Trojan Horses; VHDL; Xilinx Virtex FPGA; buffer overflow attack; code bypassing; embedded access control checks; embedded architectural design; embedded systems; hardware bound checks; jHISC; networked computer system security; programming language; protection logics; secure Java embedded processor architecture; third-party security software; unauthorized code access;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer and Information Technology Workshops, 2008. CIT Workshops 2008. IEEE 8th International Conference on
  • Conference_Location
    Sydney, QLD
  • Print_ISBN
    978-0-7695-3242-4
  • Electronic_ISBN
    978-0-7695-3239-1
  • Type

    conf

  • DOI
    10.1109/CIT.2008.Workshops.119
  • Filename
    4568514