A general method for multi-port active network reduction and realization

This paper presents a novel compact modeling technique for linear(ized) active analog circuits. The new method is based on a recently proposed general s-domain hierarchical modeling and analysis method. In this work, based on the characteristics of analog circuits, we propose a constrained linear least square based method to optimize the order reduced admittance matrices with respect to both magnitude and phase responses up to the given frequency range. Theoretically we show that the hierarchical reduction does not change the reciprocity property of the linear circuit. For analog active circuits, which typically are non-reciprocal, so do the order-reduced circuit admittance matrices after hierarchical reduction. We propose a novel general multi-port, non-reciprocal network realization method. The resulting modeling algorithm can take in the SPICE netlists of active circuits and generate high-fidelity compact macro models of the active circuits with easily controlled model accuracy and complexity. The experimental results on two low-pass active filters demonstrate effectiveness of the proposed algorithm.