Automatic Application of Last-Touch Instructions for Leakage Energy Reduction

Recently, energy dissipation in microprocessors is getting larger, which leads to a serious problem in terms of allowable temperature and performance improvement for future microprocessors. Cache memory is effective in bridging a growing speed gap between a processor and relatively slow external main memory, and has increased in its size. However, energy dissipation in the cache memory will approach or exceed 50% of the increasing total energy dissipation in processors. An important point to note is that, in the near future, static (leakage) energy will dominate the total energy consumption in deep sub-micron processes. This paper describes a code-generation technique that utilizes special instructions for energy reduction. The instructions perform self-invalidation in cache memories, which leads to efficient energy reduction. We developed a source-to-source-code compiler that implements the automatic code-generation. The simulation results of the generated codes show that our techniques can reduce a substantial amount of leakage energy without large performance degradation.