Title :
HDL based simulation of digital RF: frequency synthesizers
Author :
Neyer, Andreas ; Sappok, Sören ; Heinen, Stefan
Author_Institution :
Integrated Analog Circuits, RWTH Aachen, Germany
Abstract :
This paper proposes modelling and simulation requirements for mixed-signal RF transceivers enabling a straight forward top-down design process. A fully digital RF frequency synthesizer for GSM is presented. The modelling, simulation and evaluation process would be illustrated. The paper presents the limits of current development tools and gives requests for future enhanced modelling and simulation tools for the RF design industry. The rms phase error of the investigated architecture has been measured to be below 1.4° and the spectral margin can be maintained to be more than 8 dB.
Keywords :
cellular radio; circuit simulation; frequency synthesizers; hardware description languages; integrated circuit modelling; mixed analogue-digital integrated circuits; radiofrequency integrated circuits; transceivers; GSM; HDL based simulation; RF design industry; digital RF frequency synthesizers; mixed-signal RF transceivers; rms phase error; top-down design process; Analog circuits; CMOS process; Circuit simulation; Frequency synthesizers; Hardware design languages; Oscillators; Phase locked loops; Radio frequency; Semiconductor device modeling; Transceivers;
Conference_Titel :
Behavioral Modeling and Simulation Workshop, 2005. BMAS 2005. Proceedings of the 2005 IEEE International
Print_ISBN :
0-7803-9352-X
DOI :
10.1109/BMAS.2005.1518184
