DocumentCode :
2191952
Title :
Towards a Ternary Sigma-Delta Modulated Processor: Adder and Integrator
Author :
Sadik, Amin Z. ; Shea, Peter J O
Author_Institution :
Sch. of Eng. Syst., Queensland Univ. of Technol., Brisbane, QLD
fYear :
2008
fDate :
8-11 July 2008
Firstpage :
515
Lastpage :
520
Abstract :
Sigma delta modulated systems have a number of very appealing properties, and are therefore heavily used in analog to digital converters, amplifiers and as modulators in communication systems. This paper presents new results which show that they may also be useful for general purpose arithmetic computing. The paper introduces ternary (i.e. +1, 0 or -1) sigma delta modulated adders and integrators. Simulations show that these new structures have very promising performance.
Keywords :
adders; digital arithmetic; integrating circuits; sigma-delta modulation; adder; amplifier; analog to digital converter; arithmetic computing; communication system; integrator; ternary sigma-delta modulated processor;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer and Information Technology Workshops, 2008. CIT Workshops 2008. IEEE 8th International Conference on
Conference_Location :
Sydney, QLD
Print_ISBN :
978-0-7695-3242-4
Electronic_ISBN :
978-0-7695-3239-1
Type :
conf
DOI :
10.1109/CIT.2008.Workshops.16
Filename :
4568556
Link To Document :
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