DocumentCode
2192019
Title
Process integration of CVD Cu as a seed layer for Cu electroplating and a plug-fill application
Author
Park, Ki-Chul ; Choi, Seung-Man ; Lee, Sun-Jung ; Chang, Kyu-Hwan ; Lee, Hyeon-Deok ; Kang, Ho-Kyu ; Lee, Sang-In
Author_Institution
Semicond. R&D Center, Samsung Electron. Co. Ltd., Kyounggi, South Korea
fYear
2000
fDate
2000
Firstpage
43
Lastpage
45
Abstract
CVD Cu film has been evaluated as a seed layer for Cu electroplating and a plug-fill application for back-end Cu metallization in 0.18 μm technologies. Excellent step coverage and via plug-fill with CVD Cu were routinely obtained. CVD Cu film showed the enhanced seed layer performance compared to an ionized PVD Cu seed layer. It was found that only 40 Å PVD Cu interlayer between the TaN and CVD Cu layer is enough to obtain low via contact resistance. The scheme of the CVD Cu seed formation followed by Cu electroplating showed approximately 20% lower via resistance as compared to that of the CVD Cu plug-fill followed by Cu electroplating
Keywords
CVD coatings; contact resistance; copper; electroplated coatings; integrated circuit interconnections; integrated circuit metallisation; metallic thin films; 0.18 mum; 40 A; CVD Cu; Cu; Cu electroplating; back-end Cu metallization; low via contact resistance; plug-fill application; process integration; seed layer; step coverage; Adhesives; Atherosclerosis; Conductivity; Contact resistance; Etching; Filling; Inorganic materials; Metallization; Research and development; Semiconductor films;
fLanguage
English
Publisher
ieee
Conference_Titel
Interconnect Technology Conference, 2000. Proceedings of the IEEE 2000 International
Conference_Location
Burlingame, CA
Print_ISBN
0-7803-6327-2
Type
conf
DOI
10.1109/IITC.2000.854276
Filename
854276
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