Title :
Realistic defect coverages of voltage and current tests
Author :
Peters, Frank ; Oostdijk, Steven
Author_Institution :
Eindhoven Univ. of Technol., Netherlands
Abstract :
This paper presents the realistic defect coverage of voltage and current measurements on a Philips digital CMOS ASIC library obtained by defect simulation. This analysis was made to study the minimisation of overlap between voltage and current based test methods by means of defect detection tables. Results show a poor defect coverage of voltage measurements and the major influence of the defect resistance on the voltage detectability and the possible overlap.
Keywords :
CMOS digital integrated circuits; application specific integrated circuits; electric current measurement; fault diagnosis; integrated circuit testing; logic testing; voltage measurement; IDDQ testing; Philips digital CMOS ASIC library; current tests; defect coverages; defect detection tables; defect resistance; defect simulation; submicron ICs; voltage detectability; voltage tests; Analytical models; Bridge circuits; CMOS technology; Circuit testing; Conducting materials; Inorganic materials; Logic testing; Semiconductor device modeling; Software libraries; Voltage;
Conference_Titel :
IDDQ Testing, 1996., IEEE International Workshop on
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-8186-7655-8
DOI :
10.1109/IDDQ.1996.557798
