Rapid prototyping of digital controllers using FPGAs and ESL/HLS design methodologies

Recent advances in embedded automation applications require quality of results in terms of speed and computational complexity, along with strict time-to-market schedules. To cope with these demands, the design industry is searching for novel approaches. Performance is sought by utilizing modern FPGA devices, offering hundreds of GFLOPs with maximum power efficiency. Productivity is enforced with HighLevel Synthesis (HLS) and Electronic System Level (ESL) design methodologies, that offer an efficient abstraction level to boost-up early prototyping. This paper presents a methodology and the required tool flow for the design of a System-on-Chip (SoC) architecture, as a reference for modern control applications. The advantages of the proposed methodology are: (a) improved performance through hardware acceleration of demanding application cores, (b) improved quality of results with floating point calculations, (c) flexibility and integration of common peripheral devices supported by a RISC microcontroller and (d) improved designer productivity by avoiding Hardware Description Languages (HDLs) and other time consuming and error introducing procedures and working with C level design descriptions only. Experimental results show that the proposed SoC architecture is an efficient rapid prototyping platform for digital control applications, with very promising future extension capabilities.