A 3.1 - 4.8 GHz CMOS UWB Power Amplifier Using Current Reused Technique

This paper describes the design of a 3.1 to 4.8 GHz CMOS power amplifier (PA) for ultra-wideband (UWB) applications using TSMC 0.18-mum CMOS technology. The UWB PA proposed in this paper employs cascode topology with an additional common source stage to achieve high power gain. The current reused technique is implemented to enhance the gain at the upper end of the desired band for gain flatness and the resistive feedback at the second stage is used to improve wideband matching. The post-layout simulation results indicate that the gain at the upper end of desired frequency is increased about 11 dB and the gain flatness of 18.4 plusmn 1 dB is achieved, improved the linearity at an input 1-dB compression point of 10.6 dBm, and consumes low power (22 mW) at 1.0 V DC supply voltages.