A multi-GHz, multi-channel transient waveform digitization integrated circuit

A series of multi-channel transient waveform digitization integrated circuits with up to 5 GHz sample rates and parallel 10-bit digitization has been designed, tested, and fabricated in large quantities. The current CMOS circuit uses four arrays of 128 fast switched capacitors per channel to record four parallel analog transient inputs. Triggering and clocking is provided by an analogically-adjustable asynchronous active delay line that uses look-ahead to generate 128 multi-GHz 4-way interleaved clocks without the need for external high-speed clocking. After transient capture, each channel is fed into 128 parallel 10-bit analog to digital converters for fast, channel-parallel digitization, followed by digital readout. The fast triggering and waveform capture, channel-parallel digitization and convenient word-parallel digital readout results in a responsive and low dead-time system. Acquisition sample rates range from ∼50 kHz to ∼3 GHz. Analog input bandwidth was measured to be ∼350 MHz. Temporal noise is typically equivalent to ∼1 mV RMS, for a signal to noise ratio of ∼2,500:1, RMS. Fixed-pattern spatial noise, after on-chip digitization, is equivalent to ∼5 mV, RMS. Current efforts to improve this technology will yield larger array sizes, sample rates in excess of 10 GHz, analog bandwidth exceeding I GHz, higher conversion rates, lower dead-time, and enhanced flexibility.