A low noise sensor interface circuit in CMOS digital process

Author

Zhuolei, Huang ; Weibing, Wang ; Cheng, Peng ; Dapeng, Chen ; Wen, Ou ; Anjie, Ming

Author_Institution

Integrated Circuit Adv. Process Center, Inst. of Microelectron., Beijing, China

fYear

2011

fDate

9-11 Sept. 2011

Firstpage

33

Lastpage

36

Abstract

A low noise interface circuit of MEMS sensor system for ultra-low frequency signal is presented in this paper. The interface circuit in CMOS processes uses chopper technique which greatly reduces 1/f noise and offset voltage of small signal processing circuit. The circuit that has a gain of 63 is fabricated in 0.5um 2P3M CMOS process. The equivalent input noise caused by clock through and charge injection is lower than 1μV. The 3rd order intermodulation distortion is 2.1% when the input signal amplitude is 1mV. The circuit power consumption is 10mW.

Keywords

1/f noise; CMOS digital integrated circuits; charge injection; digital signal processing chips; intermodulation distortion; microsensors; 1/f noise reduction; 2P3M CMOS digital process; 3rd order intermodulation distortion; charge injection; chopper technique; circuit power consumption; equivalent input noise; gain 63 dB; input signal amplitude; low noise MEMS sensor interface circuit; offset voltage; power 10 mW; size 0.5 mum; small signal processing circuit; ultra-low frequency signal; voltage 1 mV; Band pass filters; Capacitors; Choppers; Demodulation; Frequency modulation; Noise; Simulation; chopper technique; digital process; interface circuit; low noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Communications and Control (ICECC), 2011 International Conference on

Conference_Location

Ningbo

Print_ISBN

978-1-4577-0320-1

Type

conf

DOI

10.1109/ICECC.2011.6067606

Filename

6067606