• DocumentCode
    2192735
  • Title

    Superblock-Based Source Code Optimizations for WCET Reduction

  • Author

    Lokuciejewski, Paul ; Kelter, Timon ; Marwedel, Peter

  • Author_Institution
    Dept. of Comput. Sci., Univ. of Dortmund, Dortmund, Germany
  • fYear
    2010
  • fDate
    June 29 2010-July 1 2010
  • Firstpage
    1918
  • Lastpage
    1925
  • Abstract
    Superblocks represent regions in a program code that consist of multiple basic blocks. Compilers benefit from this structure since it enables optimization across block boundaries. This increased optimization potential was thoroughly studied in the past for average-case execution time (ACET) reduction at assembly level. In this paper, the concept of superblocks is exploited for the optimization of embedded real-time systems that have to meet stringent timing constraints specified by the worst-case execution time (WCET). To achieve this goal, our superblock formation is based on a novel trace selection algorithm which is driven by WCET data. Moreover, we translate superblocks for the first time from assembly to source code level. This approach enables an early code restructuring in the optimizer, providing more optimization opportunities for both subsequent source code and assembly level transformations. An adaption of the traditional optimizations common subexpression and dead code elimination to our WCET-aware superblocks allows an effective WCET reduction. Using our techniques, we significantly outperform standard optimizations and achieve an average WCET reduction of up to 10.2% for a total of 55 real-life benchmarks.
  • Keywords
    embedded systems; optimising compilers; program interpreters; supervisory programs; WCET reduction; average-case execution time reduction; dead code elimination; embedded real-time system optimization; program code; program compiler; superblock translation; superblock-based source code optimization; trace selection algorithm; worst-case execution time; Algorithm design and analysis; Assembly; Optimization; Real time systems; Scheduling; Switches; Timing; Compiler; Embedded Systems; Optimizations; Real-Time; Superblock; WCET;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer and Information Technology (CIT), 2010 IEEE 10th International Conference on
  • Conference_Location
    Bradford
  • Print_ISBN
    978-1-4244-7547-6
  • Type

    conf

  • DOI
    10.1109/CIT.2010.327
  • Filename
    5577997