DocumentCode
2192982
Title
A novel phase noise reduction technique for MMIC frequency synthesizers that uses newly developed pulse generator LSI
Author
Nakagawa, T. ; Ohira, T.
Author_Institution
NTT Radio Commun. Syst. Labs., Kanagawa, Japan
fYear
1994
fDate
23-27 May 1994
Firstpage
95
Abstract
A novel phase noise reduction technique is proposed for PLL frequency synthesizers. The key circuits are fabricated in one LSI, and successfully applied to a C-band MMIC frequency synthesizer. The resultant phase noise reduction is a remarkable 10 dB.<>
Keywords
MMIC; frequency synthesizers; interference suppression; large scale integration; phase-locked loops; pulse generators; C-band; MMIC frequency synthesizers; PLL frequency synthesizers; SHF; phase noise reduction technique; pulse generator LSI; Circuits; Frequency synthesizers; Large scale integration; MMICs; Phase locked loops; Phase noise;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 1994., IEEE MTT-S International
Conference_Location
San Diego, CA, USA
ISSN
0149-645X
Print_ISBN
0-7803-1778-5
Type
conf
DOI
10.1109/MWSYM.1994.335260
Filename
335260
Link To Document