Title :
Design of application specific CISC using PEAS-III
Author :
Kitajima, Akira ; Sasaki, Toshiyuki ; Takeuchi, Yoshinori ; Imai, Masaharu
Author_Institution :
Dept. of Eng. Informatics, Osaka Electro-Commun. Univ., Neyagawa, Japan
Abstract :
Efficient design method of configurable processors with complex instructions is described in this paper. In the proposed method, HDL descriptions of a RISC type processor are generated from two kinds of descriptions: the declaration of hardware components used in the design and a behavioral description of instructions at micro architectural level. This method has been implemented in an ASIP (Application Specific Instruction set Processor) development system PEAS-III. Using PEAS-III, application specific CISC can be designed easily. The results of case studies show that application specific CISC can be superior to RISC in terms of code size and execution cycles. In addition, the time for implementing CISC instructions can be drastically reduced compared with conventional design methods.
Keywords :
application specific integrated circuits; instruction sets; reconfigurable architectures; reduced instruction set computing; ASIP; CISC; HDL descriptions; PEAS-III; RISC type processor; application specific CISC; micro architectural; Application specific processors; Delay estimation; Design engineering; Design methodology; Hardware design languages; Informatics; Power generation; Process design; Reduced instruction set computing; System-on-a-chip;
Conference_Titel :
Rapid System Prototyping, 2002. Proceedings. 13th IEEE International Workshop on
Print_ISBN :
0-7695-1703-X
DOI :
10.1109/IWRSP.2002.1029732
