Author :
Goldblatt, R.D. ; Agarwala, B. ; Anand, M.B. ; Barth, E.P. ; Biery, G.A. ; Chen, Z.G. ; Cohen, S. ; Connolly, J.B. ; Cowley, A. ; Dalton, T. ; Das, S.K. ; Davis, C.R. ; Deutsch, A. ; DeWan, C. ; Edelstein, D.C. ; Emmi, P.A. ; Faltermeier, C.G. ; Fitzsimmo
Author_Institution :
IBM Semicond. Res. & Dev. Center, Hopewell Junction, NY, USA
Abstract :
The integration of dual damascene copper with low-k dielectric at the 0.13 μm technology node is described. Up to five levels of copper wiring at three different metal pitches is provided in a spin-on organic inter metal dielectric (SiLKTM semiconductor dielectric. The Dow Chemical Co.). Additional global wiring levels in fluorosilicate glass (FSG) at two different relaxed metal pitches result in a total of up to eight levels of hierarchical wiring for enhanced BEOL performance. Successful integration was achieved while maintaining reliability standards. Development of new advanced unit processes was required to meet the challenges presented by this work. Patterning and passivation methodologies are discussed. A key feature of the integration scheme and material set reported is the resulting reduction in complexity compared to other proposed low-k integration alternatives for the current generation
Keywords :
copper; dielectric thin films; metallisation; 0.13 micron; BEOL technology; Cu; SiLK; copper wiring; dual damascene structure; fluorosilicate glass; low-k dielectric film; multilevel metallization; passivation; process integration; reliability; spin-on organic intermetal dielectric; CMOS technology; Capacitance; Chemical technology; Copper; Dielectric materials; Etching; Glass; Research and development; Semiconductor materials; Wiring;
