Copper dual damascene interconnects with very low-k dielectrics targeting for 130 nm node

Author

Kudo, H. ; Yoshie, K. ; Yamaguchi, S. ; Watanabe, K. ; Ikeda, M. ; Kakamu, K. ; Hosoda, T. ; Ohhira, K. ; Santoh, N. ; Misawa, N. ; Matsuno, K. ; Wakasugi, Y. ; Hasegawa, A. ; Nagase, K. ; Suzuki, T.

Author_Institution

ULSI Dev. Div., Fujitsu Ltd., Mie, Japan

fYear

2000

fDate

2000

Firstpage

270

Lastpage

272

Abstract

It is a great concern that a so-called full low-k interlayer dielectric (ILD) structure may degrade reliability of Cu wiring due to the poor thermal conductivity of very low-k (VLK) material. An ILD structure we proposed in this work (named hybrid) are made of VLK for the trench level and SiO₂ for the via level, to meet following two requirements; reducing wiring capacitance and not decreasing thermal conductivity so much. In this work, we have presented integration of dual damascene patterning and Cu metallization for the hybrid structure

Keywords

copper; dielectric thin films; integrated circuit interconnections; 130 nm; Cu; copper dual damascene interconnect; hybrid structure; low-k interlayer dielectric; multilevel metallization; reliability; thermal conductivity; wiring capacitance; Capacitance; Copper; Current density; Dielectrics; Etching; Integrated circuit interconnections; Silicon compounds; Temperature; Thermal conductivity; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 2000. Proceedings of the IEEE 2000 International

Conference_Location

Burlingame, CA

Print_ISBN

0-7803-6327-2

Type

conf

DOI

10.1109/IITC.2000.854345

Filename

854345