DocumentCode :
2193955
Title :
Grounded-trench-MOS structure assisted normally-off bipolar-mode power FET
Author :
Murakami, Yoshinori ; Nakajima, Yasushi ; Hayashi, Tetsuya ; Mihara, Teruyoshi
Author_Institution :
Res. Center, Nissan Motor Co. Ltd., Yokosuka, Japan
fYear :
1996
fDate :
20-23 May 1996
Firstpage :
345
Lastpage :
348
Abstract :
A normally-off bipolar-mode FET having a VDSS of 700 V with n+-n--n+ structure has been developed. The transistor has a new type trench-MOS structure. N+ -source and n--channel are sandwiched by deep trench-MOS structures whose potential is fixed to the ground. They act virtually as the gates of a long-channel JFET. The p-gate contacts with every insulating film, which controls the channel conditions by the potential of p-type inversion layer. When the gate is shorted, the channel withstands up to the avalanche condition. Furthermore, it has a VDSO of about 400 V
Keywords :
avalanche breakdown; characteristics measurement; field effect transistor switches; inversion layers; power MOSFET; power field effect transistors; power semiconductor switches; 400 V; 700 V; avalanche breakdown; channel conditions; grounded-trench-MOS structure; long-channel JFET; n+-n--n+ structure; normally-off bipolar-mode power FET; p-gate contacts; p-type inversion layer; switching speed; Conductivity; Electrodes; FETs; Fabrication; Information systems; Insulation; Laboratories; Protection; Semiconductor films; Silicon compounds;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and ICs, 1996. ISPSD '96 Proceedings., 8th International Symposium on
Conference_Location :
Maui, HI
ISSN :
1063-6854
Print_ISBN :
0-7803-3106-0
Type :
conf
DOI :
10.1109/ISPSD.1996.509512
Filename :
509512
Link To Document :
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