A 24-pulse rectifier cascaded multilevel inverter with minimum number of transformer windings

Author

Joseph, Alan ; Wang, Jin ; Pan, Zhiguo ; Chen, Lihua ; Peng, Fang Z.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., East Lansing, MI, USA

Volume

1

fYear

2005

fDate

2-6 Oct. 2005

Firstpage

115

Abstract

This paper addresses the design of a medium voltage adjustable speed drive (ASD) utilizing the benefits of cascaded inverter technology while employing a 24-pulse rectifier inspired front end. Rectifier front ends of ASDs introduce a high level of harmonics into the utility grid, creating equipment overheating problems and distorting the voltage waveform near the ASD´s connection point. To greatly reduce these harmonics while limiting cost, a cascaded multilevel inverter utilizing a 24-pulse transformer with a minimum number of windings is used. This design reduces the total harmonic current to less than 5% of the full load current over the entire frequency range. Simulation and experimental results are presented to show proof of concept.

Keywords

cost reduction; harmonic distortion; invertors; power conversion harmonics; rectifying circuits; transformer windings; variable speed drives; 24-pulse rectifier; 24-pulse transformer; adjustable speed drive; cascaded multilevel inverter; cost limitation; equipment overheating; harmonic mitigation; total harmonic current reduction; transformer windings; voltage waveform; Costs; Diodes; Harmonic distortion; Inverters; Power harmonic filters; Pulse transformers; Rectifiers; Topology; Variable speed drives; Windings;

fLanguage

English

Publisher

ieee

Conference_Titel

Industry Applications Conference, 2005. Fourtieth IAS Annual Meeting. Conference Record of the 2005

ISSN

0197-2618

Print_ISBN

0-7803-9208-6

Type

conf

DOI

10.1109/IAS.2005.1518300

Filename

1518300