Design and implementation of a self-checking scheme for railway trackside systems

Author

Schiano, Luca ; Metra, Cecilia ; Marino, Diego

Author_Institution

Dipt. di Elettronica, Inf. e Sistemistica, Bologna Univ., Italy

fYear

2002

fDate

2002

Firstpage

49

Lastpage

53

Abstract

We propose the self-checking design of the transmission and reception blocks of a trackside control system used for railway applications. Our scheme has been conceived for field-programmable gate arrays. A prototype has been implemented, whose correct operation has been verified by means of post-layout simulations and experimental measurements. Our scheme negligibly impacts system´s performance and features self-checking ability with respect to a wide set of possible internal faults, representative of the most likely faults for FPGA-implemented systems.

Keywords

fault diagnosis; fault tolerance; field programmable gate arrays; railways; transportation; field-programmable gate arrays; internal faults; post-layout simulations; railway applications; railway trackside systems; reception blocks; self-checking ability; self-checking scheme; trackside control system; transmission blocks; Aerospace electronics; Clocks; Control systems; Fault tolerance; Field programmable gate arrays; Polynomials; Rail transportation; Testing; Transmitters; Virtual prototyping;

fLanguage

English

Publisher

ieee

Conference_Titel

Memory Technology, Design and Testing, 2002. (MTDT 2002). Proceedings of the 2002 IEEE International Workshop on

ISSN

1087-4852

Print_ISBN

0-7695-1617-3

Type

conf

DOI

10.1109/MTDT.2002.1029763

Filename

1029763