An investigation into crosstalk noise in DRAM structures

The 2001 ITRS roadmap predicts continued aggressive progress towards deep submicron linewidths for at least the next 15 years. In this article we describe the results of a simulation study into the effects of crosstalk among DRAM wordlines and bitlines for present and future technology nodes predicted by the roadmap. An analog simulator was used to solve the associated transmission line equations derived from Maxwell´s equations in the time domain. Hence, we not only considered interconnect resistances and capacitances, but also inductances and realistic wave propagation effects. The circuit parameters of the simulation models were extracted from standard DRAM geometries implied by the roadmap data. Various bitline-bitline and wordline-wordline coupling scenarios were then studied in simulation. Our results suggest that down until the 22-nm node, single bitline twisting will continue to be effective against bitline-bitline coupling, but that wordline-wordline coupling effects will become more problematic.