A monolithic 2.8 V, 3.2 W silicon bipolar power amplifier with 54% PAE at 900 MHz

Author

Heinz, A. ; Simburger, W. ; Wohlmuth, H.-D. ; Weger, P. ; Wilhelm, W. ; Gabl, R. ; Aufinger, Klaus

Author_Institution

Corp. Res., INFINEON Technol. AG, Munich, Germany

fYear

2000

fDate

10-13 June 2000

Firstpage

117

Lastpage

120

Abstract

This work presents a balanced two-stage monolithic power amplifier in Si bipolar technology for 0.8-1 GHz. On-chip transformers are used as input-baluns as well as for interstage matching. A closed-loop bias circuit is introduced to diminish break-down effects and increase the maximum usable supply voltage. The chip is operating from 2.8 V to 4.5 V. At 2.8 V the output power is 3.2 W with a power-added efficiency of 54%. The maximum output power of 7.7 W with an efficiency of 57% is achieved at 4.5 V supply voltage. The small-signal gain is 38 dB.

Keywords

MMIC power amplifiers; UHF integrated circuits; UHF power amplifiers; bipolar analogue integrated circuits; elemental semiconductors; power integrated circuits; silicon; 2.8 to 4.5 V; 3.2 to 7.7 W; 38 dB; 54 to 57 percent; 800 MHz to 1 GHz; 900 MHz; RFIC; Si; Si bipolar power amplifier; Si bipolar technology; balanced two-stage amplifiers; closed-loop bias circuit; input-balun; interstage matching; monolithic bipolar power amplifier; onchip transformers; Circuits; High power amplifiers; Impedance matching; Low voltage; Mobile communication; Power amplifiers; Power generation; Power transformers; Radiofrequency amplifiers; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2000. Digest of Papers. 2000 IEEE

Conference_Location

Boston, MA, USA

ISSN

1529-2517

Print_ISBN

0-7803-6280-2

Type

conf

DOI

10.1109/RFIC.2000.854429

Filename

854429