A completely integrated 1.9 GHz receiver front-end with monolithic image reject filter and VCO

Author

Rogers, J.W.M. ; Macedo, J.A. ; Plett, C.

Author_Institution

Carleton Univ., Ottawa, Ont., Canada

fYear

2000

fDate

10-13 June 2000

Firstpage

143

Lastpage

146

Abstract

A 19 GHz monolithic superheterodyne receiver front-end with 300 MHz IF, on-chip tunable image reject filter and VCO is presented. The receiver was fabricated on a 0.5 um bipolar process. The 2.2 GHz VCO was realized with ground-shielded inductors. The performance is as follows: conversion gain: 25.6 dB, noise figure: 4.5 dB, image rejection: 65 dB, and phase noise of -103 dBc/Hz at 100 kHz offset. The LO-IF isolation improved compared to a previously fabricated front-end with off-chip VCO. This receiver front-end has NF, linearity, and phase noise suitable for DCS-1800.

Keywords

UHF filters; bipolar integrated circuits; mobile radio; superheterodyne receivers; voltage-controlled oscillators; 0.5 micron; 1.9 GHz; 25.6 dB; 4.5 dB; DCS-1800; LO-IF isolation; VCO; bipolar process; conversion gain; ground shielded inductor; monolithic integration; noise figure; on-chip tunable image reject filter; phase noise; superheterodyne receiver front-end; Band pass filters; Inductors; Noise figure; Passive filters; Phase noise; Radio frequency; Receivers; Resonator filters; Surface acoustic waves; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2000. Digest of Papers. 2000 IEEE

Conference_Location

Boston, MA, USA

ISSN

1529-2517

Print_ISBN

0-7803-6280-2

Type

conf

DOI

10.1109/RFIC.2000.854435

Filename

854435