Title :
High performance 60-GHz coplanar MMIC LNA using InP heterojunction FETs with AlAs/InAs superlattice layer
Author :
Fujihara, A. ; Mizuki, E. ; Miyamoto, H. ; Makino, Y. ; Yamanoguchi, K. ; Samoto, N.
Author_Institution :
Kansai Electron. Res. Labs., NEC Corp., Shiga, Japan
Abstract :
We describe a 60-GHz coplanar MMIC low-noise amplifier (LNA) using 0.1 /spl mu/m-gate-length InP heterojunction FETs (HJFETs). An optimum gate width of 80 /spl mu/m was determined for the first stage FET by using a small signal model including accurate scaling of the gate resistance. On-wafer noise measurements demonstrated a noise figure of 2.2 dB and a gain of 22.8 dB at 60 GHz.
Keywords :
HEMT integrated circuits; III-V semiconductors; MMIC amplifiers; coplanar waveguide components; equivalent circuits; field effect MIMIC; indium compounds; integrated circuit design; integrated circuit noise; millimetre wave amplifiers; millimetre wave field effect transistors; semiconductor device models; semiconductor device noise; semiconductor superlattices; 0.1 micron; 2.2 dB; 22.8 dB; 60 GHz; 80 micron; AlAs-InAs; AlAs/InAs superlattice layer; HJFETs; InP; InP heterojunction FETs; MMIC low-noise amplifier; coplanar MMIC LNA; gate resistance scaling; small signal model; Coplanar waveguides; Electrical resistance measurement; Electrodes; FETs; Heterojunctions; Indium phosphide; MMICs; Noise measurement; Roentgenium; Superlattices;
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2000. Digest of Papers. 2000 IEEE
Conference_Location :
Boston, MA, USA
Print_ISBN :
0-7803-6280-2
DOI :
10.1109/RFIC.2000.854451
