DocumentCode :
2196580
Title :
A new digital implementation of quadrature-quadrature phase shift keying
Author :
Acha, V. ; Carrasco, R.A.
Author_Institution :
Staffordshire Polytech., Stoke-on-Trent, UK
fYear :
1991
fDate :
17-20 Mar 1991
Firstpage :
29
Lastpage :
34
Abstract :
Describes the digital algorithm implementation of a single DSP based 1.2 Kbits/sec Q2PSK transmitter and receiver units. Further results have been obtained with this data bit rate. The algorithm has been implemented in a system based upon the TMS320C25 for the transmitter and upon the TMS320C30 for the receiver. Both, systems and algorithms are suitable for operation up to 9.6 Kbit/sec and more research is being carried out with this data bit rate. The designs of the digital filters, transmitter and receiver are expounded
Keywords :
computerised signal processing; digital filters; modems; phase shift keying; 1.2 kbit/s; 9.6 kbit/s; Q2PSK; digital filters; digital implementation; digital signal processor; modem performance; quadrature-quadrature phase shift keying; receiver; transmitter;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Telecommunications, 1991. Third IEE Conference on
Conference_Location :
Edinburgh
Print_ISBN :
0-85296-502-8
Type :
conf
Filename :
98093
Link To Document :
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