• DocumentCode
    2197150
  • Title

    Implementation of a BIC monitor in a new analog BIST structure

  • Author

    Sidiropulos, M. ; Stopjakova, V. ; Manhaeve, H.

  • Author_Institution
    Dept. of Microelectron., Tech. Univ. of Brno, Czech Republic
  • fYear
    1996
  • fDate
    24-25 Oct. 1996
  • Firstpage
    59
  • Lastpage
    63
  • Abstract
    The last step in the development of a BIST structure employing a new self-test technique for analog circuits is presented in this paper, namely the design and implementation of a suitable built-in supply current (BIC) monitor. The new self-test technique based on power supply current monitoring, takes advantage of the redundancy in the structure of fully balanced circuits. The new technique requires a special BIC monitor that provides appropriate signals for a successful fault detection. The BIC monitor, presented in this paper, is based on a second generation current conveyor CCII+, and offers an accurate measurement of supply currents with a minimal supply voltage degradation. The BIC monitor circuit was evaluated using fault simulations, which show a reasonable fault coverage. An implementation of the new BIC monitor in an analog BIST structure is finally described.
  • Keywords
    CMOS analogue integrated circuits; built-in self test; current conveyors; integrated circuit testing; BIC monitor; BIST; CMOS IC; IDDQ testing; analog circuit; fault detection; fully balanced circuit; power supply current; redundancy; second generation current conveyor; self-test; simulation; Analog circuits; Built-in self-test; Circuit faults; Current measurement; Current supplies; Electrical fault detection; Monitoring; Power supplies; Redundancy; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    IDDQ Testing, 1996., IEEE International Workshop on
  • Conference_Location
    Washington, DC, USA
  • Print_ISBN
    0-8186-7655-8
  • Type

    conf

  • DOI
    10.1109/IDDQ.1996.557817
  • Filename
    557817