Title :
Optimum Test Set for Bridging Fault Detection in Reversible Circuits
Author :
Rahaman, Hafizur ; Kole, Dipak K. ; Das, Debesh K. ; Bhattacharya, Bhargab B.
Author_Institution :
Bengal Eng. & Sci. Univ., Howrah
Abstract :
Testing of bridging faults in a reversible circuit is investigated in this paper. The intra-level single bridging fault model is considered here, i.e. any single pair of lines, both lying at the same level of the circuit, may be assumed to have been logically shorted in order to model a defect. For an (n X n) reversible circuit with d levels realized with simple Toffoli gates, the time complexity of the test generation procedure is O(nd2 log2n). A test set of cardinality O(d log2n) is found to be sufficient for testing all such detectable faults. A minimal test set can also be easily derived by using the concept of test equivalence.
Keywords :
fault diagnosis; logic circuits; logic gates; logic testing; Toffoli gates; bridging fault detection; logic circuits; reversible circuit testing; test generation procedure; time complexity; Circuit faults; Circuit synthesis; Circuit testing; Electrical fault detection; Fault detection; Logic circuits; Logic design; Logic testing; Optical computing; Quantum computing;
Conference_Titel :
Asian Test Symposium, 2007. ATS '07. 16th
Conference_Location :
Beijing
Print_ISBN :
978-0-7695-2890-8
DOI :
10.1109/ATS.2007.91