DocumentCode
2197514
Title
A high speed Viterbi decoder using path limited PRML method and its application to 1/2 inch HD full bit rate digital VCR
Author
Hara, M. ; Yoshinaka, T. ; Sugizaki, Y. ; Ohura, S.
Author_Institution
Commun. Syst. Solution Network Co., Sony Corp., Kanagawa, Japan
fYear
2000
fDate
13-15 June 2000
Firstpage
96
Lastpage
97
Abstract
A new algorithm called "path limited PRML" is described which has been used to implement a high speed Viterbi decoder LSI. Furthermore, this LSI has been used to realize an experimental 1/2" DVCR at 1.3 Gbps.
Keywords
CMOS digital integrated circuits; Large scale integration; Maximum likelihood decoding; Video tape recorders; Viterbi decoding; 0.5 inch; 1.3 Gbit/s; CMOS process; HD full bit rate digital VCR; HDTV digital VCR; high speed Viterbi decoder; high speed Viterbi decoder LSI; path limited PRML method; Bit rate; Clocks; Decoding; HDTV; Head; High definition video; Large scale integration; Phase detection; Video recording; Viterbi algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 2000. ICCE. 2000 Digest of Technical Papers. International Conference on
Conference_Location
Los Angles, CA, USA
Print_ISBN
0-7803-6301-9
Type
conf
DOI
10.1109/ICCE.2000.854513
Filename
854513
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