On-chip EMC issue: the implementation of patterned ground shields for silicon devices

This paper addresses some on-chip EMC issues for reducing power dissipation in the design of passive silicon-based devices operating at high frequencies. It is demonstrated that the implementation of patterned ground shields (PGS) together with differential technique can enhance the performance of spiral inductors, spiral transformers, and other devices effectively, which is compatible with standard CMOS fabrication technologies. However, the shielding effectiveness of a PGS is very sensitive to its embedding depth which should be chosen carefully. Some numerical results will be shown to demonstrate inductive couplings in various PGS inductors and transformers but are suppressed here.