DocumentCode :
2199582
Title :
A Novel Approach for Finding Candidate Locations for Online FPGA Placement
Author :
Hu, W. ; Wang, C. ; Ma, J.L. ; Chen, T.Z. ; Chen, D.
Author_Institution :
Coll. of Comput. Sci., Zhejiang Univ., Hangzhou, China
fYear :
2010
fDate :
June 29 2010-July 1 2010
Firstpage :
2509
Lastpage :
2515
Abstract :
Reconfigurable computing (RC) has been viewed as an efficient solution to achieve high performance and flexibility. Hardware tasks can be dynamically placed on and removed from reconfigurable platforms. Field-programmable gate arrays (FPGA) provide partially runtime reconfiguration (PRTR) at runtime. However, this reconfiguration will lead to more time overhead. An efficient algorithm to manage empty space is necessary for online task placement on a PRTR FPGA. This paper first proposes a data structure to maintain information about the available free area and then presents a novel approach to find candidate locations for online FPGA placement. Experimental results show that the approach proposed here is better than similar approaches to find locations for task placement.
Keywords :
field programmable gate arrays; reconfigurable architectures; data structure; field-programmable gate arrays; online FPGA placement; partially runtime reconfiguration; reconfigurable computing; Algorithm design and analysis; Arrays; Field programmable gate arrays; Hardware; Heuristic algorithms; Runtime; FPGA; dynamic placement; partially runtime reconfigurable; reconfigurable computing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer and Information Technology (CIT), 2010 IEEE 10th International Conference on
Conference_Location :
Bradford
Print_ISBN :
978-1-4244-7547-6
Type :
conf
DOI :
10.1109/CIT.2010.428
Filename :
5578274
Link To Document :
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