DocumentCode
2199871
Title
A radiation tolerant 0.6 μm CMOS technology
Author
Lasserre, V. ; Corbière, T. ; Thomas, B. ; Rödde, K.
Author_Institution
MATRA MHS, Nantes, France
fYear
1995
fDate
18-22 Sep 1995
Firstpage
125
Lastpage
130
Abstract
Modifications of the standard fabrication techniques of the 0.6 μm CMOS technology lead to a radiation tolerant process in terms of immunity to total dose effects (up to 500 Gy) and to latchup under heavy ions (LET up to 100 MeV/(mg/cm2)). In this paper, the process development and the evolution of device parameters as a function of total dose are presented
Keywords
CMOS integrated circuits; gamma-ray effects; integrated circuit technology; ion beam effects; radiation hardening (electronics); 0.6 micron; 500 Gy; CMOS technology; IC fabrication; LET; heavy ion irradiation; latchup; radiation tolerance; total dose; CMOS process; CMOS technology; Fabrication; Flowcharts; Isolation technology; MOS devices; MOSFETs; Military standards; Space technology; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Radiation and its Effects on Components and Systems, 1995. RADECS 95., Third European Conference on
Conference_Location
Arcachon
Print_ISBN
0-7803-3093-5
Type
conf
DOI
10.1109/RADECS.1995.509764
Filename
509764
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