0.8 μm HSOI4CB rad-tolerant technology for space applications: a solution to harden existing components with minimum design risk

Author

Dautriche, P. ; Lestrat, P. ; Josse, G. ; Debrie, F. ; Borel, G. ; Thouret, E.

Author_Institution

Thomson-CSF Semicond. Specifiques, Saint Egreve, France

fYear

1995

fDate

18-22 Sep 1995

Firstpage

152

Lastpage

154

Abstract

For several years, TCS has been involved in the transfer of epitaxial CMOS technology of microprocessors such as 68020 from Motorola and in the development of hardened Standard or ASIC products. The know-how which has bean acquired during these operations has led us to develop a rad tolerant process totally compatible in terms of design rules with standard CMOS process. Named HSOI4CB (CB for Compatible Bulk), this process is a 0.8 μm SOI CMOS with 2 levels of metallization. The use of the HSOI4CB technology allows us, without any specific effort on the design, to reach hardening levels compatible with space requirements up to more than 100 Krads

Keywords

CMOS integrated circuits; integrated circuit technology; radiation hardening (electronics); silicon-on-insulator; space vehicle electronics; 0.8 micron; 100 krad; HSOI4CB; design; epitaxial SOI CMOS technology; hardening; radiation tolerance; space applications; Annealing; CMOS process; Circuits; MOS devices; Protons; Silicon on insulator technology; Space technology; Substrates; Testing; Topology;

fLanguage

English

Publisher

ieee

Conference_Titel

Radiation and its Effects on Components and Systems, 1995. RADECS 95., Third European Conference on

Conference_Location

Arcachon

Print_ISBN

0-7803-3093-5

Type

conf

DOI

10.1109/RADECS.1995.509769

Filename

509769