Impact of leakage and short circuit current in rush current analysis of power gated domains

Author

Sreekumar, V. ; Ravichandran, S.

Author_Institution

IC Design, Cadence Design Syst., Inc., Bangalore, India

fYear

2010

fDate

18-21 March 2010

Firstpage

41

Lastpage

44

Abstract

Power shut off being a key technique for power reduction in today´s designs, it is critical to be able to verify circuit behavior when it is powered from an off state to an on state. The total rush current and turn-on time of the module can be impacted by the high short circuit current caused by slow signal slew rates and the leakage current of the module. In this paper, we present a study on how these effects impact the overall analysis and how they can be accounted for during a power-up analysis. The analysis has been done on ARM 968 processor based Wireless LAN IC.

Keywords

integrated circuit modelling; integrated logic circuits; leakage currents; logic gates; short-circuit currents; ARM 968 processor; leakage; power gated domains; power reduction; power-up analysis; rush current analysis; short circuit current; wireless LAN IC; Circuit simulation; Logic devices; Performance analysis; Power system simulation; Power system transients; Short circuit currents; Switches; Switching circuits; Turning; Wireless LAN;

fLanguage

English

Publisher

ieee

Conference_Titel

IEEE SoutheastCon 2010 (SoutheastCon), Proceedings of the

Conference_Location

Concord, NC

Print_ISBN

978-1-4244-5854-7

Type

conf

DOI

10.1109/SECON.2010.5453925

Filename

5453925