DocumentCode :
2200068
Title :
Distributed synchronization on a parallel machine with a logic layer
Author :
Filloque, J.M. ; Beaumont, C. ; Pottier, B.
Author_Institution :
Telecom Bretagne, Brest, France
fYear :
1993
fDate :
27-29 Jan 1993
Firstpage :
53
Lastpage :
58
Abstract :
ArMen is a MIMD machine whose nodes are built with a standard processor tightly connected to a FPGA. Two levels of communication can be distinguished. The first one has a high throughput and computing capabilities, and is built with a ring of FPGAs connected one to the other by a 32-bit data path. This logic layer forms an active communication ring, denoted LL. The second one is composed of the primary communication network of the MIMD machine. Current parallel machines do not offer specific support for computing and delivering critical synchronization information in a set or a subset of machine nodes. Exploiting a new growing technology, the proposed architecture gives this possibility and we show some ways of implementing a synchronization barrier, also called a strong synchronizer. We can extend the proposition to compute different functions on distributed values. Distributed and parallel simulation is the main application area currently being studied, but implementation of genetic algorithms and of data-parallel languages is also considered
Keywords :
digital simulation; genetic algorithms; logic arrays; parallel algorithms; parallel machines; synchronisation; 32 bit; 32-bit data path; ArMen; FPGA ring; MIMD machine; active communication ring; communication levels; computing capabilities; data-parallel languages; distributed simulation; distributed synchronization; distributed values; field programmable gate arrays; function computation; genetic algorithms; logic layer; parallel architecture; parallel machine; parallel simulation; primary communication network; strong synchronizer; synchronization barrier; throughput; Communication networks; Computational modeling; Computer architecture; Concurrent computing; Distributed computing; Field programmable gate arrays; Genetic algorithms; Logic; Parallel machines; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing, 1993. Proceedings. Euromicro Workshop on
Conference_Location :
Gran Canaria
Print_ISBN :
0-8186-3610-6
Type :
conf
DOI :
10.1109/EMPDP.1993.336421
Filename :
336421
Link To Document :
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