DocumentCode
2200321
Title
A 0.7-V rail-to-rail buffer amplifier with double-gate MOSFETs
Author
Parikh, Chetan D. ; Nagchoudhuri, D. ; Amara, Amara
Author_Institution
Dhirubhai Ambani Inst. of Inf. & Commun. Technol., India
fYear
2011
fDate
May 30 2011-June 1 2011
Firstpage
19
Lastpage
22
Abstract
This paper proposes a 0.7-V rail-to-rail amplifier with double-gate MOSFETs, which are possible candidates for CMOS technology nodes beyond 22nm. The back-gate of the input transistors are used to keep them on, which allows the inputs at the front gates to be varied from rail to rail. Unlike conventional rail-to-rail architectures, which require two differential pairs to achieve rail-to-rail input common-mode range, the unique properties of the double-gate transistor allow only one input differential pair to be used, thus making this a first rail-to-rail amplifier of its kind. The amplifier achieves a dc open-loop gain of 88 dB, a unity-gain frequency of 28 MHz with a phase margin of 63° at a load capacitance of 10 pF, and a dc power consumption of 80 μW.
Keywords
CMOS analogue integrated circuits; MOSFET; amplifiers; CMOS technology; back-gate; capacitance 10 pF; dc open-loop gain; dc power consumption; double-gate MOSFET; frequency 28 MHz; input transistors; load capacitance; power 80 muW; rail-rail buffer amplifier; rail-rail input common-mode range; unity-gain frequency; voltage 0.7 V; Differential amplifiers; Gain; Logic gates; MOSFETs; Rail to rail amplifiers; Rail to rail inputs;
fLanguage
English
Publisher
ieee
Conference_Titel
Faible Tension Faible Consommation (FTFC), 2011
Conference_Location
Marrakech
Print_ISBN
978-1-61284-646-0
Type
conf
DOI
10.1109/FTFC.2011.5948907
Filename
5948907
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