Title :
Fault diagnosis of logical circuits
Abstract :
Some new techniques for finding minimal set of tests which detect faults in combinational logic networks are described. A systematic procedure which can be programmed on a digital computer is given. Moreover, a new approach to the design of fault detection experiments for sequential machines which takes into account the actual construction of the sequential network is described.
Keywords :
Circuit faults; Circuit testing; Combinational circuits; Electrical fault detection; Fault detection; Fault diagnosis; Logic testing; National electric code; Sociotechnical systems; Tellurium;
Conference_Titel :
Switching and Automata Theory, 1969., IEEE Conference Record of 10th Annual Symposium on
Conference_Location :
Waterloo, ON, Canada
DOI :
10.1109/SWAT.1969.6
