Title :
RECOD: a retiming heuristic to optimize resource and memory utilization in HW/SW codesigns
Author :
Chatha, Karam S. ; Vemuri, Ranga
Author_Institution :
Dept. of Electron. Comput., Cincinnati Univ., OH, USA
Abstract :
Hardware/software designs of embedded systems are characterized by stringent performance constraints. Pipelined implementation of a design is an effective way for maximizing the performance of a design. In this paper we present a novel retiming heuristic to obtain pipelined schedules for hardware-software codesigns. The heuristic aims at maximizing the throughput of a loop oriented resource constrained codesign while minimizing its shared memory usage. The effectiveness of the proposed technique is demonstrated by experimentation
Keywords :
high level synthesis; real-time systems; resource allocation; software engineering; systems analysis; HW/SW codesigns; RECOD; embedded systems; loop oriented resource constrained codesign; memory utilization; performance constraints; pipelined schedules; resource optimisation; retiming heuristic; Application specific integrated circuits; Computer architecture; Contracts; Embedded system; Monitoring; Processor scheduling; Read-write memory; Steady-state; System buses; Throughput;
Conference_Titel :
Hardware/Software Codesign, 1998. (CODES/CASHE '98) Proceedings of the Sixth International Workshop on
Conference_Location :
Seattle, WA
Print_ISBN :
0-8186-8442-9
DOI :
10.1109/HSC.1998.666251
