DocumentCode
2200710
Title
Computation-effective 3-D graphics rendering architecture for embedded multimedia system
Author
Bor-Sung Liang ; Chein-Wei Jen
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear
2000
fDate
13-15 June 2000
Firstpage
330
Lastpage
331
Abstract
A new architecture is proposed to realize 3-D graphics rendering for an embedded multimedia system. Because only 20% to 83% triangles in original 3-D object models are visible by simulation, our architecture is designed to eliminate the redundant operations on invisible triangles without image quality loss. The simulation and analysis results shows that this architecture can save 5% to 60.3% CPU operations compared with traditional architectures.
Keywords
digital signal processing chips; embedded systems; multimedia systems; rendering (computer graphics); 3D graphics rendering architecture; 3D object models; CPU operations; chipset; embedded multimedia system; simulation; Computer architecture; Consumer electronics; Embedded computing; Embedded system; Graphics; Hardware; Image quality; Multimedia systems; Pipelines; Rendering (computer graphics);
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 2000. ICCE. 2000 Digest of Technical Papers. International Conference on
Conference_Location
Los Angles, CA, USA
Print_ISBN
0-7803-6301-9
Type
conf
DOI
10.1109/ICCE.2000.854663
Filename
854663
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