Design and implementation of a self-checking scheme for railway trackside systems

Author

Schiano, L. ; Metra, C. ; Marino, Daniel

Author_Institution

Dipt. di Elettronica, Inf. e Sistemistica, Bologna Univ., Italy

fYear

2002

fDate

2002

Firstpage

243

Lastpage

247

Abstract

We propose the self-checking design of the transmission and reception blocks of a trackside control system used for railway applications. Our scheme has been conceived for Field-Programmable Gate Arrays (FPGAs). A prototype has been implemented, whose correct operation has been verified by means of post-layout simulations and experimental measurements. Our scheme negligibly impacts system´s performance and features self-checking ability with respect to a wide set of possible internal faults, representative of the most likely faults for FPGA-implemented systems.

Keywords

automatic testing; fault tolerance; field programmable gate arrays; logic testing; railways; receivers; signalling; transmitters; transport control; FPGA-implemented systems; field-programmable gate arrays; internal faults; online testing; post-layout simulations; railway applications; railway trackside systems; reception blocks; self-checking design; trackside control system; transmission blocks; Aerospace electronics; Clocks; Control systems; Fault tolerance; Field programmable gate arrays; Polynomials; Rail transportation; Testing; Transmitters; Virtual prototyping;

fLanguage

English

Publisher

ieee

Conference_Titel

On-Line Testing Workshop, 2002. Proceedings of the Eighth IEEE International

Print_ISBN

0-7695-1641-6

Type

conf

DOI

10.1109/OLT.2002.1030226

Filename

1030226