A New PWM Strategy to Reduce the Common-Mode Voltage

High rate of variation of common-mode voltage (CMV) brings problems to the pulse width modulation (PWM) inverter motor drive system. In this paper, a new two-stage CMV reduction PWM strategy is proposed. In the high voltage region, the peak-to-peak value of the CMV is reduced to one third of the DC voltage, even despite of the dead-time effect and in the low voltage region, both the CMV and the current ripple are reduced. In the entire voltage range, the linear modulation region is not limited and the switching loss is reduced because of fewer switching actions. Experimental results are presented to fully support the above-mentioned claims